Serial interface – ADLINK CoreModule 435 User Manual

Page 29

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Chapter 3

Hardware

CoreModule 435

Reference Manual

23

Serial Interface

The Vortex CPU contains the circuitry for all four serial ports. The CoreModule 435 provides serial ports 1

and 2 through transceivers U7 and U9 (headers J3 and J9), serial port 3 through transceiver U4 (header J14)

and serial port 4 through transceiver U5 (header J13). The serial ports support the following features:

Programmable word length, stop bits and parity

16-bit programmable baud rate generator

Interrupt generator

Loop-back mode

16-bit FIFOs for each port

Ports 1, 2, 3, and 4 are supported by the Vortex processor and are 16C550/16C552 compatible

Serial 1 (J3, COM1) supports RS-232/RS-485 with full modem operation

Serial 2 (J9, COM2) supports RS-232/RS-485 with full modem operation

Serial 3 (J14, COM3) supports RS-232 with full modem operation

Serial 4 (J13, COM4) supports RS-232 with full modem operation

To implement the two-wire RS-485 mode on either serial port, you must tie together the equivalent pins for
the selected port.

0070-0071

RTC/ NMI enable

0080-008F

DMA Page

00A0-00A1

Slave Interrupt Controller (#2)

00C0-00DF

Secondary DMA Controller (#2)

00F0-00FF

Math Coprocessor (only in the DX processor)

01F0-01F7

IDE 0 (can be disabled)

02E8-2FF

Serial Port 4 (COM4) (base configuration @
3F8h/2F8h/3E8h/2E8h/10)

02F8-02FF

Serial Port 2 (COM2) (base configuration @
3F8h/2F8h/3E8h/2E8h/10)

03E8-3EF

Serial Port 3 (COM3) (base configuration @
3F8h/2F8h/3E8h/2E8h/10)

03F6

IDE 0 (see 1F0)

03F8-03FF

Serial Port 1 (COM1) (base configuration @
3F8h/2F8h/3E8h/2E8h/10)

0CF8

PCI Configuration Address

0CFC-0CFF

PCI Configuration Data

NOTE

The RS-232/RS-485 modes for Serial Port 1 (COM1) and Serial Port 2 (COM2)
are selected in BIOS Setup Utility. However, the RS-232 mode is the default
(Standard) for any serial port.

RS-485 mode termination is selected with jumper JP2 Serial 1 (COM1) and JP1
Serial 2 (COM2) on the module. Refer to

Table 2-3

for more information.

Table 3-4. I/O Address Map (Continued)

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