Altera Hybrid Memory Cube Controller - Manual (Page 14)

Parameter Type Range Default Setting Parameter Description
Enable
M20K ECC
support
Boolean • True
• False
False
Specifies whether the IP core
supports the ECC feature in the
Arria 10 M20K memory blocks
that are configured as part of the
IP core.
You can turn on this parameter
to enhance data reliability by
enabling single-error correct,
double-adjacent-error correct,
and triple-adjacent-error detect
ECC functionality in the M20K
memory blocks configured in
your IP core. You can turn off
this parameter to decrease
latency and resource utilization.
Related Information
• Arria 10 Transceiver PHY User Guide
Provides information about the Arria 10 ADME feature.
• Embedded Memory Blocks in Arria 10 Devices
Provides information about the Arria 10 M20K block ECC feature.
RX Mapping and TX Mapping Parameters
The HMC Controller IP core provides the RX mapping and TX mapping parameters for flexibility in
board design.
The default values of these parameters specify the correct IP core behavior when the HMC device
LxTX[<i>]
output signal connects to the HMC Controller IP core
hmc_lxrx[<i>]
input port, and the
LxRX[<i>]
input signal connects to the HMC Controller IP core
hmc_lxtx[<i>]
output port, for each
<i>
.
However, if your design constraints prevent you from connecting these signals as expected, you can
instead modify one or both HMC Controller IP core mapping parameters to accommodate the non-
standard connection.
Note: The Quartus II Fitter prevents you from mapping the HMC Controller IP core lanes to Arria 10
device transceiver channels out of order. Therefore, these two parameters only compensate for out-
of-order connections on the board between the Arria 10 transceiver pins and the HMC device
ports.
UG-01152
2015.05.04
RX Mapping and TX Mapping Parameters 2-5
Getting Started with the HMC Controller IP Core Altera Corporation
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