Altera Hybrid Memory Cube Controller - Manual (Page 16)

Figure 2-3: Non-Default RX Mapping Parameter Value Example
If you connect the IP core
hmc_lxrx[2:0]
input signals according to the table, and connect all other IP
core
hmc_lxrx[<i>]
input ports to the corresponding HMC device
LxTX[<i>]
output ports, you would
set the value of the RX mapping parameter to 0xFEDCBA9876543021 to compensate for the non-
standard connection.
Note: The RX mapping parameter specifies the HMC device lane by position and the IP core lane by
value. The figure illustrates a mapping parameter value of 0xFED.......43021 and not a value of
0xFED....43102.
FPGA
HMC Controller
Hybrid Memory Cube
hmc_lxtx[0] LxRX[0]
LxTX[0] hmc_lxrx[0]
hmc_lxtx[1] LxRX[1]
LxTX[1] hmc_lxrx[1]
hmc_lxtx[2] LxRX[2]
LxTX[2] hmc_lxrx[2]
hmc_lxtx[3] LxRX[3]
LxTX[3] hmc_lxrx[3]
hmc_lxtx[F] LxRX[F]
LxTX[F] hmc_lxrx[F]
hmc_lxtx[E] LxRX[E]
LxTX[E] hmc_lxrx[E]
hmc_lxtx[D] LxRX[D]
LxTX[D] hmc_lxrx[D]
hmc_lxtx[C] LxRX[C]
LxTX[C] hmc_lxrx[C]
. . . . . . . . .
RX mapping value 0xFEDCBA9876543021
TX mapping value 0xFEDCBA9876543210
Example: Non-Default TX Mapping Parameter Value
Table 2-3: Non-Default TX Connections
HMC Device Input Signal IP Core Output Signal
LxRX[2] hmc_lxtx[0]
LxRX[1] hmc_lxtx[2]
LxRX[0] hmc_lxtx[1]
UG-01152
2015.05.04
RX Mapping and TX Mapping Parameters 2-7
Getting Started with the HMC Controller IP Core Altera Corporation
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