Altera Hybrid Memory Cube Controller - Manual (Page 41)

Signal Name Direction Description
dp_req_data[511:0]
(for full-
width IP cores)
dp_req_data[255:0]
(for half-
width IP cores)
Input Write data.
The application must transfer the least significant bytes of
the write payload in the first cycle.
If the size of the payload is not an integer multiple of the
data bus width, then in the final data transfer cycle, the
application must transfer the remaining write payload in
the least significant bytes of
dp_req_data
. For example,
the application must:
• Transfer a 16-byte payload in
dp_req_data[127:0]
.
• Transfer a 32-byte payload to a full-width or half-width
IP core in
dp_req_data[255:0]
.
• Transfer the final (most significant) 16 bytes of a 112-
byte payload to a half-width IP core in
dp_req_
data[127:0]
in the fourth data transfer clock cycle.
During a read request, the value on this data bus does not
matter.
dp_req_sop
Input Start of packet. The application must assert this signal in
the first cycle of all transactions.
dp_req_eop
Input End of packet. The application must assert this signal in
the final cycle of all transactions.
Application Response Interface
The data path response interface, or application response interface, provides a 512-bit or 256-bit data bus
and dedicated signals for the IP core to provide HMC response information to the application. Full-width
IP cores have a 512-bit data bus, and half-width IP cores have a 256-bit data bus. The interface supports
Read responses with payload sizes up to 128 bytes. In full-width variations, the maximum payload size
limits the interface to data bursts of 2 or fewer
core_clk
clock cycles. In half-width variations, the
maximum payload size limits the interface to data bursts of 4 or fewer
core_clk
clock cycles. Read
responses with a payload size that is not a multiple of the bus size carry the end of the payload in the lower
order bits of the data bus in the final clock cycle.
The HMC Controller returns the 9-bit tag from the original request with every response it sends on the
data path response interface. The application must use the tag to match each response with the
corresponding request.
You cannot back-pressure the IP core data path response interface. To ensure the application can process
every response it receives, the application must only send requests for which it has the resources to
process or buffer the response.
4-4 Application Response Interface
UG-01152
2015.05.04
Altera Corporation HMC Controller IP Core Signals
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