Avago Technologies LSI53C1020 - Manual (Page 25)

Summary of LSI53C1020 Features 1-11
Version 2.4 Copyright © 2001–2004 by LSI Logic Corporation. All rights reserved.
1.8.3 Integration
The following features make the LSI53C1020 easy to integrate:
• Is backward compatible with previous revisions of the PCI and SCSI
specifications
• 448-pin and 456-pin BGA packages are pin compatible with the
LSI53C1000R SCSI controller
• Provides a low-risk migration path to Ultra320 SCSI from the
LSI53C1000R
• Supports a full 32-bit or 64-bit PCI/PCI-X DMA bus master
• Reduces time to market with the Fusion-MPT architecture
– Single driver binary for SCSI and Fibre Channel products
– Thin, easy to develop drivers
– Reduced integration and certification effort
• Provides integrated LVDlink transceivers
1.8.4 Flexibility
The following features increase the flexibility of the LSI53C1020:
• Universal LVD transceivers are backward compatible with SE
devices
• Provides a flexible programming interface to tune I/O performance or
to adapt to unique SCSI devices
• Supports MSI or pin-based (INTA/ or ALT_INTA/) interrupt signaling
• Can respond with multiple SCSI IDs
• Is compatible with 3.3 V and 5.0 V PCI signaling
– Drives and receives 3.3 V PCI signals
– Receives 5.0 V PCI if the PCI5VBIAS pin connects to 5.0 V, but
does not drive 5.0 V signals on the PCI bus
1.8.5 Reliability
The following features enhance the reliability of the LSI53C1020:
• Supports ISI compensation