Intel IA-32 - Manual (Page 572)

15-22 Vol. 3A
8086 EMULATION
3. The virtual-8086 monitor should read the VIF flag in the EFLAGS register.
— If the VIF flag is clear, the virtual-8086 monitor sets the VIP flag in the EFLAGS
image on the stack to indicate that there is a deferred interrupt pending and returns to
the protected-mode handler.
— If the VIF flag is set, the virtual-8086 monitor can handle the interrupt if it “belongs”
to the 8086 program running in the interrupted virtual-8086 task; otherwise, it can call
the protected-mode interrupt handler to handle the interrupt.
4. The protected-mode handler executes a return to the program executing in virtual-8086
mode.
5. Upon returning to virtual-8086 mode, the processor continues execution of the 8086
program.
When the 8086 program is ready to receive maskable hardware interrupts, it executes the STI
instruction to set the VIF flag (enabling maskable hardware interrupts). Prior to setting the VIF
flag, the processor automatically checks the VIP flag and does one of the following, depending
on the state of the flag:
•
If the VIP flag is clear (indicating no pending interrupts), the processor sets the VIF flag.
•
If the VIP flag is set (indicating a pending interrupt), the processor generates a general-
protection exception (#GP).
The recommended action of the protected-mode general-protection exception handler is to then
call the virtual-8086 monitor and let it handle the pending interrupt. After handling the pending
interrupt, the typical action of the virtual-8086 monitor is to clear the VIP flag and set the VIF
flag in the EFLAGS image on the stack, and then execute a return to the virtual-8086 mode. The
next time the processor receives a maskable hardware interrupt, it will then handle it as
described in steps 1 through 5 earlier in this section.
If the processor finds that both the VIF and VIP flags are set at the beginning of an instruction,
it generates a general-protection exception. This action allows the virtual-8086 monitor to
handle the pending interrupt for the virtual-8086 mode task for which the VIF flag is enabled.
Note that this situation can only occur immediately following execution of a POPF or IRET
instruction or upon entering a virtual-8086 mode task through a task switch.
Note that the states of the VIF and VIP flags are not modified in real-address mode or during
transitions between real-address and protected modes.
NOTE
The virtual interrupt mechanism described in this section is also available for
use in protected mode, see Section 15.4, “Protected-Mode Virtual Interrupts”.