4 pt5mc ethernet ports, 5 compactpci packet switch backplane (cpsb) ports, 1 compactpci connector j3, power and ground – SBE HighWire HW400c/2 User Manual

Page 41

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HighWire HW400c/2 User Reference Guide Rev 1.0

3

ernet Ports

.4.4 PT5MC Eth

Each of the two PT5MC sites on the HW400c/2 have two 10/100/1000 Mbps ports
connected to the Ethernet switch. The signals conform to PICMG ECN 2.15-1.0-
001, using the first 24 pins of the respective JN4 connectors.

pactPCI J3 connector using a

FET switch specially designed for signals such as Gigabit Ethernet. The PTID bits

ontrol the FET, when a PT5MC module is installed in either mezzanine card site.

at



N4 pins 5, 6, 11, 12, 17, 18, 23 and 24 are switched to ground through discrete FETs

t the JN4 connector when a PT5MC module is installed. This has the effect of

CompactPCI J5 connector as well, so

aution must be exercised not to damage circuitry on an installed RTM.

r


.4.5 CompactPCI Packet Switch Backplane (cPSB) Ports


Two of the 10/100/

and Port 1, are

uted to the CompactPCI J3 connector as specified for Packet Switching Backplane

(PSB) in PICMG 2.16. See Table 14 and Table 15. The HW400c

s configure

PCIG

16 Node c



3.4.5.1 CompactPCI Connector J3, pow

and ground

The H

400c/2 us

of the J3

, designa

the PIC

16 as U

,

as po

and grou

in order

vide eno

rrent to

e some

more

er hungr

cards.

power pins cannot be disconnected. This can

dam

o some Re

nsition M

(RTM

BE ass

power a

grou

ins are shown in bold in T




The JN4 Ethernet connections are switched to the Com

c
Should a non-PT5MC module be installed in one of the sites, the JN4 signals for th
site are routed to the CompactPCI J5 connector as user I/O according to PICMG 2.3
R1.0.

J
a

!

grounding the respective connections at the
c


!

PT5MC cards with network connections through Pn4, must be transformer coupled o
the link to the layer 2 switch will not be established.

3

1000BaseT ports of the Ethernet switch, Port 0

ro

/2 i

d as a

2.

ard.

er

W

we

es some

nd pins

pins

to pro

t

ed by

ugh cu

MG 2

handl

.

ser I/O

of the

r

pow

y PTMC

T

odules

hese

age t

ar Tra

). The S

igned

nd

nd p

able 15.

!

October 10, 2006

Copyright 2006, SBE, Inc.

Page

29

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