Texas Instruments TMS320C6454 - Manual (Page 199)

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PRODUCT PREVIEW
RMREFCLK
(Input)
1
2
3
3 4
5
MRXD1-MRXD0,
MCRSDV,
MRXER (Inputs)
TMS320C6454
Fixed-Point Digital Signal Processor
SPRS311A – APRIL 2006 – REVISED DECEMBER 2006
Table 7-83. Timing Requirements for EMAC RMII Input Receive for 100 Mbps
(1)
(see Figure 7-67 )
-720
-850
NO. UNIT
-1000
MIN MAX
Setup time, receive selected signals valid before MREFCLK (at DSP)
1 t
su(MRXD-MREFCLK)
4.0 ns
high/low
2 t
h(MREFCLK-MRXD)
Hold time, receive selected signals valid after MREFCLK (at DSP) high/low 2.0 ns
(1) For RMII, receive selected signals include: MRXD[1:0], MRXER, and MCRSDV.
Figure 7-67. EMAC Receive Interface Timing [RMII Operation]
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