Product preview – Texas Instruments TMS320C6454 User Manual
Page 92
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PRODUCT PREVIEW
6.3 Electrical Characteristics Over Recommended Ranges of Supply Voltage and Operating
TMS320C6454
Fixed-Point Digital Signal Processor
SPRS311A – APRIL 2006 – REVISED DECEMBER 2006
Case Temperature (Unless Otherwise Noted)
PARAMETER
TEST CONDITIONS
(1)
MIN
TYP
MAX
UNIT
3.3-V pins (except
DV
DD33
= MIN,
PCI-capable and I2C
0.8DV
DD33
V
I
OH
= MAX
pins)
I
OH
= -0.5 mA,
High-level
PCI-capable pins
(2)
0.9DV
DD33
V
V
OH
DV
DD33
= 3.3 V
output voltage
RGMII pins
DV
DD15
- 0.4
V
DDR2 memory
DV
DD18
- 0.28
V
controller pins
3.3-V pins (except
DV
DD33
= MIN,
PCI-capable and I2C
0.22DV
DD33
V
I
OL
= MAX
pins)
I
OL
= 1.5 mA,
PCI-capable pins
(2)
0.1DV
DD33
V
DV
DD33
= 3.3 V
Low-level output
V
OL
voltage
Pulled up to 3.3 V, 3 mA sink
I2C pins
0.4
V
current
RGMII pins
0.4
V
DDR2 memory
0.28
V
controller pins
V
I
= V
SS
to DV
DD33
, pins
without internal pullup or
-1
1
uA
pulldown resistor
3.3-V pins (except
PCI-capable and I2C
V
I
= V
SS
to DV
DD33
, pins with
50
100
400
uA
pins)
internal pullup resistor
Input current
I
I
(3)
V
I
= V
SS
to DV
DD33
, pins with
[DC]
-400
-100
-50
uA
internal pulldown resistor
I2C pins
0.1DV
DD33
≤
V
I
≤
0.9DV
DD33
-10
10
uA
PCI-capable pins
(4)
-1000
1000
uA
RGMII pins
0.4
V
AECLKOUT,
CLKR1/GP[0],
CLKX1/GP[3],
-8
mA
SYSCLK4/GP[1],
EMU[18:0], CLKR0,
CLKX0
EMIF pins (except
AECLKOUT), NMI,
TOUT0L, TINP0L,
TOUT1L, TINP1L,
PCI_EN,
High-level
EMAC-capable pins
I
OH
output current
(except RGMII pins),
-4
mA
[DC]
RESETSTAT,
McBSP-capable pins
(except CLKR1/GP[0],
CLKX1/GP[3], CLKR0,
CLKX0), GP[7:4], and
TDO
PCI-capable pins
(2)
-0.5
mA
RGMII pins
-8
mA
DDR2 memory
-13.4
mA
controller pins
(1)
For test conditions shown as MIN, MAX, or NOM, use the appropriate value specified in the recommended operating conditions table.
(2)
These rated numbers are from the PCI Local Bus Specification (version 2.3). The DC specification and AC specifications are defined in
Table 4-3 and Table 4-4, respectively, of the PCI Local Bus Specification.
(3)
I
I
applies to input-only pins and bi-directional pins. For input-only pins, I
I
indicates the input leakage current. For bi-directional pins, I
I
includes input leakage current and off-state (hi-Z) output leakage current.
(4)
PCI input leakage currents include Hi-Z output leakage for all bidirectional buffers with 3-state outputs.
Device Operating Conditions
92