Texas Instruments TMS320C6454 - Manual (Page 209)

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PRODUCT PREVIEW
TMS320C6454
Fixed-Point Digital Signal Processor
SPRS311A – APRIL 2006 – REVISED DECEMBER 2006
Table 7-98. PCI Back End Configuration Registers
DSP ACCESS
ACRONYM DSP ACCESS REGISTER NAME
HEX ADDRESS RANGE
02C0 0000 - 02C0 000F - Reserved
02C0 0010 PCISTATSET PCI Status Set Register
02C0 0014 PCISTATCLR PCI Status Clear Register
02C0 0018 - 02C0 001F - Reserved
02C0 0020 PCIHINTSET PCI Host Interrupt Enable Set Register
02C0 0024 PCIHINTCLR PCI Host Interrupt Enable Clear Register
02C0 0028 - 02C0 002F - Reserved
02C0 0030 PCIBINTSET PCI Back End Application Interrupt Enable Set Register
02C0 0034 PCIBINTCLR PCI Back End Application Interrupt Enable Clear Register
02C0 0038 PCIBCLKMGT PCI Back End Application Clock Management Register
02C0 003C - 02C0 00FF - Reserved
02C0 0100 PCIVENDEVMIR PCI Vendor ID/Device ID Mirror Register
02C0 0104 PCICSRMIR PCI Command/Status Mirror Register
02C0 0108 PCICLREVMIR PCI Class Code/Revision ID Mirror Register
02C0 010C PCICLINEMIR PCI BIST/Header Type/Latency Timer/Cacheline Size Mirror Register
02C0 0110 PCIBAR0MSK PCI Base Address Mask Register 0
02C0 0114 PCIBAR1MSK PCI Base Address Mask Register 1
02C0 0118 PCIBAR2MSK PCI Base Address Mask Register 2
02C0 011C PCIBAR3MSK PCI Base Address Mask Register 3
02C0 0120 PCIBAR4MSK PCI Base Address Mask Register 4
02C0 0124 PCIBAR5MSK PCI Base Address Mask Register 5
02C0 0128 - 02C0 012B - Reserved
02C0 012C PCISUBIDMIR PCI Subsystem Vendor ID/Subsystem ID Mirror Register
02C0 0130 - Reserved
02C0 0134 PCICPBPTRMIR PCI Capabilities Pointer Mirror Register
02C0 0138 - 02C0 013B - Reserved
02C0 013C PCILGINTMIR PCI Max Latency/Min Grant/Interrupt Pin/Interrupt Line Mirror Register
02C0 0140 - 02C0 017F - Reserved
02C0 0180 PCISLVCNTL PCI Slave Control Register
02C0 0184 - 02C0 01BF - Reserved
02C0 01C0 PCIBAR0TRL PCI Slave Base Address 0 Translation Register
02C0 01C4 PCIBAR1TRL PCI Slave Base Address 1 Translation Register
02C0 01C8 PCIBAR2TRL PCI Slave Base Address 2 Translation Register
02C0 01CC PCIBAR3TRL PCI Slave Base Address 3 Translation Register
02C0 01D0 PCIBAR4TRL PCI Slave Base Address 4 Translation Register
02C0 01D4 PCIBAR5TRL PCI Slave Base Address 5 Translation Register
02C0 01D8 - 02C0 01DF - Reserved
02C0 01E0 PCIBAR0MIR PCI Base Address Register 0 Mirror Register
02C0 01E4 PCIBAR1MIR PCI Base Address Register 1 Mirror Register
02C0 01E8 PCIBAR2MIR PCI Base Address Register 2 Mirror Register
02C0 01EC PCIBAR3MIR PCI Base Address Register 3 Mirror Register
02C0 01F0 PCIBAR4MIR PCI Base Address Register 4 Mirror Register
02C0 01F4 PCIBAR5MIR PCI Base Address Register 5 Mirror Register
02C0 01F8 - 02C0 02FF - Reserved
02C0 0300 PCIMCFGDAT PCI Master Configuration/IO Access Data Register
02C0 0304 PCIMCFGADR PCI Master Configuration/IO Access Address Register
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