ADIC SNC 5100 - Manual (Page 19)

Hardware Product Description and Features 11
6-00020-02
SNC 5100
Hardware Product Description and Features
This section describes the capabilities of the product and outlines some of the
key features of its interfaces.
• An IBM 405GP 200 MHz processor, with integrated instruction and data
caches, and internal serial I/O and Ethernet interfaces.
• An Intel 80303 100 MHz Processor, with integrated instruction and data
caches.
• QLogic 23x0 Fibre Channel protocol chip
• 32 MB ECC protected SDRAM program memory.
• 128 MB ECC protected SDRAM data buffer memory.
• FLASH memory for operational firmware, power on self-test code,
diagnostic functions, and system utilities.
• Non-volatile SRAM for persistent configuration tables and event logs.
• VxWorks

real-time operating system (RTOS).
Fibre Channel Interfaces
Interfaces for host and device attachment include two 2-Gb/s bi-directional
Short Wave connections.
The Giga-Bit Interface Converter (GBIC) can interoperate with both 2 Gb/sec
and 1 Gb/sec data links. The GBIC is hot-swappable and is the only
component, except for the SNC 5100 unit itself that is a Field Replaceable Unit
(FRU). See “Removing and Replacing the GBIC” on page 82.
Table 1: Fibre Channel Connections
GBIC speed Cable Type Distance
1.062.5 Mb/sec 62.5
µ
multimode 300 m
1.062.5 Mb/sec 50
µ
multimode 500 m
2.125 Mb/sec 62.5
µ
multimode 300 m
2.125 Mb/sec 50
µ
multimode 500 m