ADLINK PXI-2022 - Manual (Page 33)

Function Block and Operation Theory 25
ter. Please refer to Table 4-1 below and Section “4.3.4” on page
30 for more details.
Refer to Figure 4-3 and use the post trigger mode as an example.
When a trigger is accepted by data acquisition module, the acqui-
sition engine of the card will begin to acquire data that coming
from ADC and store these sampled data to onboard memory. The
sampled data is generated con-tinuously at the rising edge of
timebase according to the scan interval counter setting. While
sampled data reaches customer specified number, in the below
example is 256, the acquisition ends. Once the acquisition ends,
acquisition engine begins to send request to system and transfer
data from onboard memory back to system by DMA.
Counter Name Length Valid value Description
ScanIntrv 32-bit 4 to 4294967296
Scan Interval Counter.
This counter is a TIMEBASE(80MHz) divider
to the achieve equivalent sam-pling rate of
DAQ. The equation is:
Sampling rate = TIMEBASE / ScanIntrv
The value of TIMEBASE de-pends on the
card type. Take PXI-2022 (250KS/s) as an
example, the ScanIntrv = 320 results in
250KS/s and Sca-nIntrv = 640 results in
125KS/s, and so on.
DataCnt 31-bit 1 to 2147483648
Data Counter.
The amount of data to be acquired can be
specified. The PXI-2022 includes 8 K sample
space to store acquired data.
trigDelayTicks 32-bit 1 to 536870911
Delay Trigger Counter.
The delay trigger counter is used to indicate
the time be-tween a trigger event and the
start of an acquisition. The unit of a delay
count is the period of the TIMEBASE. For
PXI-2022, the unit is 100ns. Refer to sec-tion
3.5.4 for more detail.
ReTrgCnt 32-bit 1 to 4294967296
Re-Trigger Counter.
The DAQ can enable re-trigger to accept
multiple triggers. Refer to section 4.5.5 for
more details.
Table 4-1: Basic Counters