Altera Active Serial Memory Interface - Manual (Page 20)

The
rdid_out[7..0]
signal holds the value of the memory capacity ID until the device resets.
Therefore, you must execute this read command only once.
Note: To meet setup and hold time requirements, assert the
read_rdid
signal any time
between the rising edges of the
clkin
signal, and keep the
read_rdid
signal
asserted for at least one full clock cycle. Ensure that the
read_rdid
signal assertion
does not coincide with the rising edges of the
clkin
signal.
If you keep the
read_rdid
signal asserted while the
busy
signal is deasserted after the IP core has
finished processing the read command, the IP core re-registers the
read_rdid
signal as a value of
one and carries out the command again. Therefore, you must deassert the
read_rdid
signal
before the busy signal is deasserted.
Read Silicon ID from the EPCS Device
Use the
read_sid
signal to instruct the IP core to read the silicon ID from the EPCS device.
Figure 4: Reading Silicon ID
This figure shows an example of the latency when the Altera ASMI Parallel IP core is executing the read
command. The latency shown does not correctly indicate the true processing time. The latency only
shows the command.
The IP core registers the
read_sid
signal on the rising edge of the
clkin
signal. After the IP core
registers the
read_sid
signal, it asserts the
busy
signal to indicate that the read command is in
progress.
Ensure that the silicon ID appears on the
epcs_id[7..0]
signal before the
busy
signal is
deasserted. Therefore, you can sample the
epcs_id[7..0]
signal as soon as the
busy
signal is
deasserted.
The
epcs_id[7..0]
signal holds the value of the silicon ID until the device resets. Therefore, you
must execute this command only once.
Note: To meet setup and hold time requirements, assert the
read_sid
signal any time
between the rising edges of the
clkin
signal, and keep the
read_sid
signal
asserted for at least one full clock cycle. Ensure that the
read_sid
signal assertion
does not coincide with the rising edges of the
clkin
signal.
If you keep the
read_sid
signal asserted while
busy
signal is deasserted and the IP core has
finished processing the read command, the IP core re-registers the
read_sid
signal as a value of
one and carries out another read command. Therefore, before the IP core deasserts the
busy
signal, you must deassert the
read_sid
signal.
20 Read Silicon ID from the EPCS Device
UG-ALT1005
2014.12.15
Altera Corporation Altera ASMI Parallel IP Core User Guide
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