Document Outline

• DAQArbTM 5411 User Manual
  • Important Information
    • Warranty
    • Copyright
    • Trademarks
    • Warning
  • Table of Contents
  • About This Manual
    • Organization of This Manual
    • Conventions Used in This Manual
    • Customer Communication
  • Chapter 1 Introduction
    • About Your DAQArb 5411
    • What You Need to Get Started
    • Software Programming Choices
      • National Instruments Application Software
      • NI-DAQ Driver Software
    • Optional Equipment
    • Cabling
    • Unpacking
  • Chapter 2 Installation and Configuration
    • Installation
    • Hardware Configuration
    • Installing the Optional Memory Module
  • Chapter 3 Signal Connections
    • I/O Connector
      • ARB Connector
      • SYNC Connector
      • PLL Ref Connector
      • Dig Out Connector
        • Connector Pin Assignments
        • Signal Descriptions
    • SHC50-68 50-Pin Cable Connector
    • Power-Up and Reset Conditions
  • Chapter 4 Arb Operation
    • Waveform Generation
    • Update Rate
    • Arb Mode
      • Waveform Size and Resolution
        • Waveform Memory
        • Minimum Buffer Size and Resolution
      • Waveform Linking and Looping
        • Waveform Staging
    • Direct Digital Synthesis (DDS) Mode
      • Frequency Resolution and Lookup Memory
      • Frequency Hopping and Sweeping
    • Triggering
      • Trigger Sources
      • Modes of Operation
        • Single Trigger Mode
        • Continuous Trigger Mode
        • Stepped Trigger Mode
        • Burst Trigger Mode
    • Marker Output Signal
    • Analog Output
      • SYNC Output and Duty Cycle
      • Output Attenuation
      • Output Impedance
      • Output Enable
      • Pre-attenuation Offset
    • Phase-Locked Loops
      • Master/Slave Operation
    • Analog Filter Correction
    • Digital Pattern Generation
    • RTSI Trigger Lines
    • Calibration
  • Appendix A Specifications
    • Analog Output
    • Voltage Output
      • Sine Spectral Purity
      • Filter Characteristics
      • Waveform Specifications
      • Timing I/O
    • Triggers
      • Digital Trigger
      • RTSI
    • Bus Interface
    • Operational Modes
    • Other Outputs
      • SYNC Out
      • Marker Output
      • Digital Pattern Output
      • External Clock Reference Input
    • Internal clock
    • Mechanical
  • Appendix B Waveform Sampling and Interpolation
  • Appendix C Customer Communication
  • Glossary
  • Index
  • Figures
    • Figure 11. The Relationship between the Programmi...
    • Figure 31. DAQArb 5411 I/O Connector
    • Figure 32. Output Levels and Load Termination Usi...
    • Figure 33. SYNC Output and Duty Cycle
    • Figure 34. DAQArb 5411 50-Pin Digital Output Conn...
    • Figure 35. SHC50-68 68-Pin Connector Pin Assignme...
    • Figure 41. DAQArb 5411 Block Diagram
    • Figure 42. Waveform Data Path Block Diagram
    • Figure 43. Waveform Memory Architecture
    • Figure 44. Waveform Linking and Looping
    • Figure 45. Waveform Staging Block Diagram
    • Figure 46. Waveform Generation Process
    • Figure 47. DDS Building Blocks
    • Figure 48. Waveform Generation Trigger Sources
    • Figure 49. Single Trigger Mode for Arb Mode
    • Figure 410. Single Trigger Mode for DDS Mode
    • Figure 411. Continuous Trigger Mode for Arb Mode
    • Figure 412. Continuous Trigger Mode for DDS Mode
    • Figure 413. Stepped Trigger Mode for Arb Mode
    • Figure 414. Burst Trigger Mode for Arb Mode
    • Figure 415. Burst Trigger Mode for DDS Mode
    • Figure 416. Markers as Trigger Outputs
    • Figure 417. Analog Output and SYNC Out Block Diag...
    • Figure 418. Waveform, Trigger, and Marker Timings...
    • Figure 419. Output Attenuation Chain
    • Figure 420. Phase-Locked Loop (PLL) Architecture
    • Figure 421. Master/Slave Configurations for Phase...
    • Figure 422. Analog Filter Correction
    • Figure 423. Digital Pattern Generator Data Path
    • Figure 424. Digital Pattern Generation Timing
    • Figure 425. DAQArb 5411 RTSI Trigger Lines and Ro...
    • Figure B1. Analog Filter and Signal Images withou...
    • Figure B2. Digital Filter, Analog Filter, and Sig...
    • Figure B3. Waveform Updates
  • Tables
    • Table 31. Digital Output Connector Signal Descrip...
    • Table 41. Generated Marker Positions