Figure 4-11. extstrobe* signal timing, Trig1 signal -19, Figure 4-11. extstrobe* signal timing -19 – National Instruments PCI-6110E/6111E User Manual

Page 52: Trig1 signal

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Chapter 4

Signal Connections

© National Instruments Corporation

4-19

PCI-6110E/6111E User Manual

Figure 4-11 shows the timing for the hardware-strobe mode
EXTSTROBE* signal.

Figure 4-11. EXTSTROBE* Signal Timing

TRIG1 Signal

Any PFI pin can externally input the TRIG1 signal, which is available
as an output on the PFI0/TRIG1 pin.

Refer to Figures 4-8 and 4-9 for the relationship of TRIG1 to the DAQ
sequence.

As an input, the TRIG1 signal is configured in the edge-detection mode.
You can select any PFI pin as the source for TRIG1 and configure the
polarity selection for either rising or falling edge. The selected edge
of the TRIG1 signal starts the data acquisition sequence for both
posttriggered and pretriggered acquisitions. The 611X E supports
analog triggering on the PFI0/TRIG1 pin. See

Chapter 3,

Hardware Overview,

for more information on analog triggering.

As an output, the TRIG1 signal reflects the action that initiates a DAQ
sequence. This is true even if the acquisition is being externally
triggered by another PFI. The output is an active high pulse with a
pulse width of 25 to 50 ns. This output is set to tri-state at startup.

t

w

t

w

V OH

V OL

t

w

= 600 ns or 5

µ

s

PCI_E.book Page 19 Thursday, June 25, 1998 12:55 PM

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