IEI Integration PCISA-945GSE v1.10 - Manual (Page 43)

PCISA-945GSE CPU Card
Page 25
PIN NO. DESCRIPTION PIN NO. DESCRIPTION
25 CD2# 50 GND2
Table 3-8: CF Card Socket Pinouts
3.2.7 Digital I/O Connector
CN Label: DIO1
CN Type: 10-pin header (2x5)
CN Location: See Figure 3-9
CN Pinouts: See Table 3-9
The digital input/output connector is managed through a Super I/O chip. The DIO
connector pins are user programmable.
Figure 3-9: Digital I/O Connector Locations
PIN NO. DESCRIPTION PIN NO. DESCRIPTION
1 GND 2 VCC
3 Output 3 4 Output 2
5 Output 1 6 Output 0
7 Input 3 8 Input 2