Gate drive duration (gd_dur) – address 33 – Cirrus Logic CS1631 User Manual

Page 30

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CS1630/31

30

DS954F3

6.5 Color Polynomial Coefficient (Q3, Q2, Q1, Q0)

Address 25 - 32

Coefficients of the color polynomial used to calculate the gain (GAIN

DR

) that controls the current in the white

LED channel based on the current dim level. The value is a two's complement number in the range of
-8.0

value<8.0, with the binary point to the right of bit 12. Coefficients Q3, Q2, Q1, and Q0 are distributed in

the gain polynomial:

where,

D = the normalized dim value and is 0<D<1.0
GAIN

DR

= gain of the channel based on the dim value. The polynomial coefficients should be selected such

that the computed GAIN

DR

is always a positive number such that 0<GAIN

DR

<4.

Color Polynomial Coefficients, Qxx, are 16-bits in length where Qxx-MSB is the most significant byte and
Qxx-LSB is the least significant byte.

6.6 Gate Drive Duration (GD_DUR)

Address 33

GD_DUR sets the maximum gate drive duration for the second stage (flyback, buck, or tapped buck). The reg-

ister value is an unsigned integer in the range of 0

value255. The maximum gate drive duration is determined

by:

The maximum gate drive duration can be configured from 350ns to 102.35

s.

MSB

14

13

12

11

10

9

8

7

6

5

4

3

2

1

LSB

-(2

3

)

2

2

2

1

2

0

2

-1

2

-2

2

-3

2

-4

2

-5

2

-6

2

-7

2

-8

2

-9

2

-10

2

-11

2

-12

7

6

5

4

3

2

1

0

2

7

2

6

2

5

2

4

2

3

2

2

2

1

2

0

GAINDR

Q

 3

=

D

3

Q2 D

2

Q1 D

Q0

+

+

+

GD_DUR 8

 7

+

 50

ns

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