Cirrus Logic CS5373A - Manual (Page 20)

CS5373A
20 DS703F2
3. SYSTEM DIAGRAM
CS5373A
TDATA
CAP +
CAP -
BUF+
BUF-
OUT+
OUT-
M CLK
M SYNC
GND
M ODE1
M ODE2
ATT 0
ATT 1
M ODE0
ATT 2
VA -
2.5 V
VREF
10 Ω
VREF +
VREF -
100 µ F
0.1 µF
VA+
VA + VD
0. 1µF 0 .1µF
VD VA+
10 nF
C0 G
GPIO
CS5378
SIGNALS
M CLK
M SYNC
TBSDATA
GPIO
GPIO
GPIO
GPIO
GPIO
SENSOR
TEST OUTPUT
ELECTRONICS
TEST OUTPUT
VA-
+
VA-
Route VREF as diff pair
Route OUT as diff pair
Route BUF as diff pair
M DATA
M FLAG
M DATA
M FLAG
INR+
INF+
INF-
INR-
20 nF *
C0G
20 nF *
C0 G
INPUT FROM
CS 3301 A/02 A
AM PLIFIER
*Populate with 2 x 10 nF or
1 x 22 nF C0 G or better . 680 Ω
680 Ω
680 Ω
680 Ω
Figure 8. Connection Diagram
Digital Filter
w/ PLL
AMP
Geophone
or
Hydrophone
Sensor
M
U
X
μController
or
Configuration
EEPROM
Communication
Interface
CS3301A
CS3302A
CS5378
System
Telemetry
ΔΣ
Modulator
and
Test DAC
CS5373A
20 nF
C0G
680 Ω
680 Ω
Figure 7. System Diagram