Cirrus Logic CS61880 - Manual (Page 4)

CS61880
4 DS450PP3
14.33.2 Interrupt Status Registers ............................................................................... 41
15. ARBITRARY WAVEFORM GENERATOR ........................................................................... 42
16. JTAG SUPPORT .................................................................................................................. 43
16.1 TAP Controller ............................................................................................................... 44
16.1.1 JTAG Reset ....................................................................................................... 44
16.1.2 Test-Logic-Reset ............................................................................................... 44
16.1.3 Run-Test-Idle .................................................................................................... 44
16.1.4 Select-DR-Scan ................................................................................................ 44
16.1.5 Capture-DR ....................................................................................................... 44
16.1.6 Shift-DR ............................................................................................................. 44
16.1.7 Exit1-DR ............................................................................................................ 44
16.1.8 Pause-DR .......................................................................................................... 45
16.1.9 Exit2-DR ............................................................................................................ 45
16.1.10 Update-DR ...................................................................................................... 45
16.1.11 Select-IR-Scan ................................................................................................ 45
16.1.12 Capture-IR ....................................................................................................... 45
16.1.13 Shift-IR ............................................................................................................ 45
16.1.14 Exit1-IR ........................................................................................................... 46
16.1.15 Pause-IR ......................................................................................................... 46
16.1.16 Exit2-IR ........................................................................................................... 46
16.1.17 Update-IR ........................................................................................................ 46
16.2 Instruction Register (IR) ................................................................................................. 46
16.2.1 EXTEST ............................................................................................................ 46
16.2.2 SAMPLE/PRELOAD ......................................................................................... 46
16.2.3 IDCODE ............................................................................................................ 46
16.2.4 BYPASS ............................................................................................................ 46
16.3 Device ID Register (IDR) ............................................................................................... 47
17. BOUNDARY SCAN REGISTER (BSR) ................................................................................ 47
18. APPLICATIONS .................................................................................................................... 50
18.1 Transformer Specifications ............................................................................................ 52
18.2 Crystal Oscillator Specifications ..................................................................................... 52
18.3 Line Protection ............................................................................................................... 52
19. CHARACTERISTICS AND SPECIFICATIONS .................................................................... 53
19.1 Absolute Maximum Ratings ........................................................................................... 53
19.2 Recommended Operating Conditions ............................................................................ 53
19.3 Digital Characteristics .................................................................................................... 54
19.4 Transmitter Analog Characteristics ................................................................................ 54
19.5 Receiver Analog Characteristics .................................................................................... 55
19.6 Jitter Attenuator Characteristics ..................................................................................... 56
19.7 Master Clock Switching Characteristics ......................................................................... 58
19.8 Transmit Switching Characteristics ................................................................................ 58
19.9 Receive Switching Characteristics ................................................................................. 58
19.10 Switching Characteristics - Serial Port ......................................................................... 60
19.11 Switching Characteristics - Parallel Port (Multiplexed Mode) ..................................... 61
19.12 Switching Characteristics- Parallel Port (Non-Multiplexed Mode) ............................... 64
19.13 Switching Characteristics - JTAG ................................................................................ 67
20. COMPLIANT RECOMMENDATIONS AND SPECIFICATIONS .......................................... 68
21. 160-BALL FBGA PACKAGE DIMENSIONS ........................................................................ 69
22. 144-PIN LQFP PACKAGE DIMENSIONS ....................................................................... 70