Cirrus Logic CS61880 - Manual (Page 59)

CS61880
DS450PP3 59
RCLK
t
su
RPOS/RNEG
CLKE = 1
t
su
t
h
t
h
RPOS/RNEG
CLKE = 0
Figure 20. Recovered Clock and Data Switching Characteristics
TPOS/TNEG
TCLK
t
pw2
t
pwh2
t
su2
t
h2
Figure 21. Transmit Clock and Data Switching Characteristics
Any Digital Output
10%
90%
t r t f
10%
90%
Figure 22. Signal Rise and Fall Characteristics