ADLINK PXIe-9848 - Manual (Page 36)

26 Operations
Internal Oscillator
The PXIe-9848 is equipped with a stable, low jitter reference oscil-
lator for ADCs, at 10 MHz.
PXI_CLK10 Clock
The PXIe-9848 can receive the timebase from the PXI_CLK10
clock, the signal of which originates at the PXI Express chassis
backplane, matched in propagation delay within 1 ns.
PXIe_CLK100 Clock
The PXIe-9848 can receive the timebase from the PXIe_CLK100
clock, the signal of which originates at the PXI Express chassis
backplane, matched in propagation delay within 200 ps.
3.5.2 Basic Acquisition Timing
The PXIe-9848 commences acquisition upon receipt of a trigger
event originating with software command, external digital trigger,
or the PXI Trigger Bus. The Timebase is a clock provided to the
ADC and acquisition engine for essential timing. The Timebase is
from an onboard 100MHz oscillator. To achieve different sampling
rates, a scan interval counter is used.
Using the post-trigger mode as an example, as shown, when a
trigger is accepted by the digitizer, the acquisition engine com-
mences acquisition of data from ADC, and stores the sampled
data to the onboard FIFO. When FIFO is not empty, data will be
transferred to system memory immediately through the DMA
engine. The sampled data is generated continuously at the rising
edge of Timebase according to the scan interval counter setting.
When sampled data reaches a specified value, in this example
256, acquisition ends.