ADLINK PXI-9527 - Manual (Page 19)

Introduction 9
PXI-9527
1.3.3 Triggers, Timebase
Triggers
Trigger source
Software command, analog input, external digital
trigger, PXI star trigger, and PXI trigger bus [0..7]
Trigger mode Post trigger, delay trigger
Table 1-11: Triggers
Analog Trigger
Source
AI0 - AI1
Level ± Full-scale, programmable
Trigger conditions Positive or negative
Trigger resolution 24 bit
Table 1-12: Analog Trigger
Digital Trigger
Sources
Front panel SMB connector
Compatibility 5V TTL
Trigger polarity Rising or falling edge
Pulse width 65 ns minimum
Table 1-13: Digital Trigger
Timebase
Frequency
80 MHz
Internal Timebase Accuracy ±20 ppm, over operating tempera-
ture range
Table 1-14: Timebase