ADLINK PXI-9527 - Manual (Page 35)

Operations 25
PXI-9527
3.2.3 ADC and Analog Input Filter
ADC (Analog-to-Digital Converter)
The PXI-9527 provides sigma-delta analog-to-digital convert-
ers, suitable for vibration, audio, and acoustic measurement.
The analog side of the sigma-delta ADC is 1-bit, and the digital
side performs oversampling, noise shaping and digital filtering.
For example, if a desired sampling rate is 108kS/s, each ADC
samples input signals at 6.912MS/s, 64 times the sampling
rate. The 1-bit 6.912MS/s data streams from 1-bit ADC to its
internal digital filter circuit to produce 24-bit data at 108kS/s.
The noise shaping removes quantization noise from low fre-
quency to high frequency. With the digital filter at the last stage,
the digital filter improves the ADC resolution and removes high
frequency quantization noise.
The relationship between ADC sample rate and DDS output
clock is as follows
Filter
Each channel has a two-pole low pass filter. The filters limit the
bandwidth of the signal path and reject band noise.
3.2.4 FIFO and DMA Transfer For Analog Input
FIFO
One FIFO is implemented on the PXI-9527 for analog input
data storage. FIFO depth is 4096 samples, shared between
both AI channels. When only one AI channel is enabled, the
4096-sample-FIFO is used for one-channel data storage.
When both are enabled, the 4096-sample-FIFO is shared
between both channels.
Sampling
Rate
2 K - 54 kHz
54 K - 108
kHz
108 K-216
kHz
216 K - 432
kHz
DDS CLK
512 K -
13.824 MHz
6.912 M-
13.824 MHz
6.912 M-
13.824 MHz
13.824 M -
27.648 MHz
Table 3-4: ADC Sample Rates VS DSS Output Clock