ADLINK PXI-9527 - Manual (Page 39)

Operations 29
PXI-9527
3.3.3 DAC and Analog Output Filter
DAC (Digital-to-Analog Converter)
The PXI-9527 provides two 24-bit delta-sigma DACs, separat-
ing sample rates into four regions between 1kS/s and 216kS/s,
as shown in Table 3-7, “DAC (Digital-to-Analog Converter)”.
Different bandwidths of internal digital filter for each region opti-
mize DA dynamic performance over all sample rate regions.
For example, lower sample rates correspond to a lowered digi-
tal filter bandwidth. SNR of the output current is improved and
the requirement for external analog low pass filtering is elimi-
nated.
The relationship between DAC sample rate and DDS output
clock is as follows
Analog Front-End Filter
Each channel has a 3-pole low pass filter. The cutoff frequency
is set at 110 kHz to limit the bandwidth of the signal path and
eliminate most out-of-band images and noise.
3.3.4 FIFO and DMA Transfer For Analog Output
FIFO
The PXI-9527 implements two FIFOs for analog output, each
having a depth of 2048 samples.
Midscale
–1LSB
FFFFFF -1.19 uV -0.119 uV -0.012 uV
-FSR 800000 -10 V -1 V -0.1 V
Update
Rate
1K-27kHz 27K-54kHz 54K-108kHz 108K-216kHz
DDS CLK
512 K-13.824
MHz
6.912 M-
13.824 MHz
6.912 M-
13.824 MHz
13.824 M-
27.648 MHz
Table 3-7: DAC (Digital-to-Analog Converter)
Description
Digital
Input Code
Bipolar Analog Output
Table 3-6: Digital Input Code and Analog Output Range