1 pci and pcie > pcie configuration – ADLINK cExpress-HL User Manual

Page 59

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cExpress-HL

Page 59

Feature

Options

Description

4096 Bytes

PCI Express Link Register Settings

Info only

ASPM Support
WARNING: Enabling ASPM may cause some

PCI-E devices to fail

Disabled
Auto
Force L0s

Set the ASPM Level: Force L0s - Force all links to L0s
Auto - BIOS auto configure
Disabled - Disables ASPM

Extended Synch

Disabled
Enabled

If enabled, allows generation of Extended Synchronization
patterns.

Link Training Retry

Disable
2
3
5

Defines number of retry attempts software will take to retrain
the link if previous training attempt was unsuccessful.

Link Training Timeout (Us)

100

Defines number of microseconds software will wait before
polling 'Link Training' bit in Link Status register. Value range
from 10 to 10000 uS.

Unpopulated Links

Keep Link ON
Disabled

In order to save power, software will disable unpopulated PCI
Express links if this option set to Disabled.

Restore PCIE Registers

Enabled
Disabled

On non-PCI Express aware OSes (pre Windows Vista) some
devices may not be correctly reinitialized after S3. Enabling
this restores PCI Express device configurations on S3 resume.
Warning: Enabling this may cause issues with other hardware
after S3 resume.

PCIe Configuration

Info only

PCIe Configuration

Submenu

7.3.7.1

PCI and PCIe > PCIe Configuration

Feature

Options

Description

PCIe Configuration

Info only

PCI Express Clock Gating

Disable
Enable

Enable / Disable PCI Express Clock Gating for each root port.

DMI Link ASPM Control

Disable
Enable

The control of Active State Power Management on both NB side
and SB side of the DMI Link.

DMI Link Extended Synch Control

Disable
Enable

The control of Extended Synch on SB side of the DMI Link.

PCIe-USB Glitch W/A

Disable
Enable

PCIe-USB Glitch W/A for bad USB device(s) connected behind
PCIE/PEG Port.

PCIE Root Port Function Swapping

Disable
Enable

Enable / Disable PCI Express PCI Express Root Port Function
Swapping.

Subtractive Decode

Disable
Enable

Enable / Disable PCI Express Subtractive Decode.

PCIE Ports 1-4 Configuration

4x1 Port
1X2 2X1 Port
2X2 Port
1X4 Port

To configure PCI-E Port 1-4 of PCH.
[4X1] : Port 1-4 (x1) and Port 8 (x1)
[1x2 2x1]: Port 1 (x2), Port 2 (disabled), Ports 3 and Port 4 (x1)
[2x2] : Port 1-2 (x2) and Port 3-4 (x2) / [1x4]:Port 1 (x4),
Ports 2-4 (disable)

PCI Express Root Port 1~4

Submenu

Configure PCI Express Root Port 1~4 setting.

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