ADLINK cExpress-HL - Manual (Page 60)

Page 60 cExpress-HL
PCI and PCIe > PCIe Configuration > PCI Express Port x
Feature Options Description
PCI Express Port x Enabled
Disabled Enable or disable the PCI Express port x in the chipset.
ASPM support Disabled
L0s
L1
L0Sl1
Auto Set the ASPM Level: Force L0s – Force all links to L0s State :
AUTO – BIOS auto configure : DISABLE – Disables ASPM
L1 Substates Disabled
L1.1
L1.2
L1.1 & L1.2 PCI Express L1 Substates settings
URR Disabled
Enabled Enable or disable PCI Express Unsupported Request Reporting.
FER Disabled
Enabled Enable or disable PCI Express Device Fatal Error Reporting.
NFER Disabled
Enabled Enable or disable PCI Express Device Non-Fatal Error
Reporting.
CER Disabled
Enabled Enable or disable PCI Express Device Correctable Error
Reporting.
CTO Disable
Enable Enable / Disable PCI Express Completion Timer TO.
SEFE Disabled
Enabled Enable or disable Root PCI Express System Error on Fatal
Error.
SENFE Disabled
Enabled Enable or disable Root PCI Express System Error on Non-Fatal
Error.
SECE Disabled
Enabled Enable or disable Root PCI Express System Error on
Correctable Error.
PME SCI Disabled
Enabled Enable or disable PCI Express PME SCI.
Hot Plug Disabled
Enabled Enable or disable PCI Express hotplug.
Speed Auto
Gen 2
Gen 1 Configure PCIe port speed.
Detect Non-Compiance Disable
Enable Detect Non-Compliance PCI Express Device. If enable, it will
take more time at POST time.
Extra Bus Reserved 0 Extra Bus Reserved (0-7) for bridges behind this Root Bridge.
Reseved Memory 10 Reserved Memory Range for this Root Bridge.
Prefetchable Memory 10 Prefetchable Memory Range for this Root Bridge.
Reserved I/O 4 Reserved I/O (4K/8K/12K/16K/.../48K) Range for this Root
Bridge.
PCIE LTR Disable
Enable PCIE Latency Reporting Enable/Disable.
PCIE LTR Lock Disable
Enable PCIE LTR Configuration Lock.