Altera Avalon Verification IP Suite - Manual (Page 162)

1–6 Chapter 1: SOPC Builder Tutorial
Verifying Avalon-MM Slave DUT
Avalon Verification IP Suite User Guide May 2011 Altera Corporation
Observing the Results
In this test, the Avalon-MM Master BFM writes five words of random data to the
on-chip memory (DUT). The Avalon-MM Master BFM then reads back the five words
and compares the data read to the expected values. If simulation is successful, the
message shown in
Example 1–2 appears.
Figure 1–2 shows the waveform when the Avalon-MM Master BFM writes and reads
to the slave DUT.
Example 1–2. Message in ModelSim Transcript Console when Running Simulation for Avalon-MM
Slave DUT
960000: INFO: master_bfm_tb: Test has completed. 5 pass, 0 fail
Figure 1–2. Master BFM writing to and reading from the Slave DUT
master_bfm_tb.tb.
DUT.the_master_bfm
reset
waitrequest
address[15:0]
write
writedata[31:0]
read
readdata[31:0]
readdatavalid
byteenable[3:0]
master_bfm_tb.tb.
DUT.the_ram
clken
address[9:0]
chipselect
wren
write
writedata[31:0]
readdata[31:0]
byteenable[3:0]
0000 0004 0008 000C 0010 0000 0004 0008 000C 0010
00000004 00000001 00000003 00000005
00000004 00000001 00000003 00000005 00000004 00000001 00000003 00000005
F
000 001 002 003 004 000 001 002 003 004
00000004 00000001 00000003 00000005
00000004 00000001 00000003 00000005 00000004 00000001 00000003 00000005
F
clk
clk