Document Outline

• PCI-9524
• Revision History
• Preface
• Table of Contents
• List of Figures
• List of Tables
• 1 Introduction
  • Figure 1-1: PCI-9524 Product Image
  • 1.1 Features
  • 1.2 Applications
  • 1.3 Specifications
    • Table 1-1: -3dB small signal bandwidth: (Typical, 25°C)
    • Table 1-2: System Noise (including Quantization, Typical, 25°C)
    • Table 1-3: Transducer Input Impedance
    • Table 1-4: Transducer CMRR (DC to 60 Hz, Typical 25°C)
    • Table 1-5: Settling Error: (Typical, 25°C)
    • Table 1-6: Programmable input range and gain
    • Table 1-7: -3dB small signal bandwidth vs. input range
    • Table 1-8: -3dB small signal bandwidth vs. sampling rates, in ±10V range
    • Figure 1-2: Effective-number-of-bits vs. Gain
    • Figure 1-3: RMS Noise in µV vs. Gain
    • Figure 1-4: Spectral Response ±10 V range, 0.996094 Hz sine wave, -1 dB FS
    • Figure 1-5: Spectral Response ±5 V range, 0.996094 Hz sine wave, -1 dB FS
    • Figure 1-6: Spectral Response ±2.5 V range, 0.996094 Hz sine wave, -1 dB FS
    • Figure 1-7: Spectral Response ±1.25 V range, 0.996094 Hz sine wave, -1 dB FS
    • Figure 1-8: Frequency Response Sampling at 30,000 SPS
    • Figure 1-9: Frequency Response Sampling at 15,000 SPS
    • Figure 1-10: Frequency Response Sampling below 15,000 SPS
    • Table 1-9: General Purpose Input Impedance
    • Table 1-10: General Purpose CMRR (DC to 60 Hz, Typical, 25°C)
    • Table 1-11: Settling Error: (Typical, 25ºC)
  • 1.4 Software Support
• 2 Getting Started
  • 2.1 Installation Environment
  • 2.2 Package Contents
  • 2.3 PCI-9524 Layout
    • Figure 2-1: PCI-9524 PCB Layout and Mechanical Drawing
  • 2.4 Installing the Card
  • 2.5 PCI Configuration
• 3 Signal Connections
  • 3.1 Connectors & Pin Assignments
    • Figure 3-1: CN1 Connector & Pin Assignments
    • Figure 3-2: CN2 Connector & Pin Assignments
    • Figure 3-3: SSI Connector & Pin Assignments
    • Table 3-1: I/O Signal Descriptions
  • 3.2 Analog Input Signal Connections
    • 3.2.1 Signal Sources
    • 3.2.2 Input Configurations
      • Figure 3-4: Connecting to a four-terminal load-cell transducer using a four-wire connection
      • Figure 3-5: Connecting to a six-terminal load-cell transducer using a six-wire connection
      • Figure 3-6: Connecting to a four-terminal load-cell transducer using a six-wire connection
      • Figure 3-7: Ground-referenced source and differential input
      • Figure 3-8: Floating source and differential input
  • 3.3 Isolated Digital Signal Connection
    • 3.3.1 Signal Sources and Terminal Devices
    • 3.3.2 Connecting to/from External Encoders
      • Figure 3-9: Connecting to an external encoder with NPN sink drivers
      • Figure 3-10: Connecting to an external encoder with PNP source drivers
      • Figure 3-11: Connecting to an external encoder with push-pull source drivers
      • Figure 3-12: Connecting to an external encoder with differential line-drivers
    • 3.3.3 Connecting to External Servo Amplifiers
      • Figure 3-13: Connecting to an external servo-amplifier with opto-coupler inputs
      • Figure 3-14: Connecting to an external servo-amplifier with differential line-receivers
    • 3.3.4 Interfacing Isolated DO with External Loads
      • Figure 3-15: Connecting to an external resistive load from the isolated DO sink driver
      • Figure 3-16: Connecting to an external inductive load from an isolated DO sink driver
    • 3.3.5 Interfacing Isolated DI with External Devices
      • Figure 3-17: Connecting to a low-side push button
      • Figure 3-18: Connecting to an external sink driver
• 4 Operation Theory
  • 4.1 PCI-9524 Function Diagram
    • Figure 4-1: PCI-9524 Function Diagram
  • 4.2 Analog Input Channels
    • 4.2.1 Signal Acquisition and Processing Flow
      • Figure 4-2: Signal acquisition and data processing flow for transducer input channels
    • 4.2.2 How to Define a 1 in 200,000 Count Resolution
    • 4.2.3 Data Rate versus Sampling Rate
    • 4.2.4 Auto-scan, Multiplexing and Settling Time
      • Table 4-1: Data Rates vs. Multiplexing, Auto-zero & ADC Sampling Rates, in Samples-per-second (SPS)
    • 4.2.5 Power Line Noise Rejection
      • Figure 4-3: SINC Filter Power Line Noise Rejection at 60 Hz Multiples
    • 4.2.6 Excitation and Remote-sensing
    • 4.2.7 Thermal EMF, 1/f Noise and Auto-zero
      • Table 4-2: Temperature Coefficient of different metal junctions
      • Figure 4-4: The Effect of Auto-zero on Thermal Noise and 1/f Noise, ADC running at 60 SPS
    • 4.2.8 Warm-up Requirement
    • 4.2.9 Post-processing IIR Digital Filter
      • Figure 4-5: Digital Filter Tap Length Effects on Signal Frequency Responses
      • Table 4-3: Default Threshold Values (ADC counts) vs. ADC Sampling Rates
    • 4.2.10 RAW Data Format
      • Table 4-4: RAW Data Format
    • 4.2.11 AD Data Format
      • Table 4-5: Bipolar analog input ranges and output digital codes for transducer input channels
      • Table 4-6: Bipolar analog input ranges and AD codes for general purpose input channels
    • 4.2.12 Data Transfer Modes
      • Figure 4-6: Linked List of PCI address DMA descriptors
    • 4.2.13 Trigger Modes
      • Figure 4-7: Post trigger
  • 4.3 D/A Conversion
    • Table 4-7: Bipolar output code table
  • 4.4 Isolated Encoder Input Channels
    • Figure 4-8: X4 Encoder mode
  • 4.5 Isolated Pulse-Command Generator
  • 4.6 Isolated Digital I/O
    • 4.6.1 Isolated Digital Inputs
    • 4.6.2 Isolated Digital Outputs
  • 4.7 Trigger Sources
    • 4.7.1 Software-Trigger
    • 4.7.2 External Digital Trigger
      • Figure 4-9: External digital trigger
    • 4.7.3 Pulse Comparator Trigger
    • 4.7.4 Position Comparator Trigger
• 5 Calibration
  • 5.1 Loading Calibration Constants
  • 5.2 Auto-calibration
  • 5.3 Saving Calibration Constants
• Important Safety Instructions