FUJITSU MHT2060BH - Manual (Page 212)

Interface
5-138 C141-E203-01EN
(54) WRITE FP DMA QUEUED (X'61')
•
Description
For details about control of the WRITE FP DMA QUEUED command, see Section
5.4.6.
At command issuance (Shadow Block Registers setting contents)
CM 0 1 1 0 0 0 0 1
DH FUA L 1 x xx
CH EXP
CH
CL EXP
CL
SN EXP
SN
SC EXP
LBA (47-40)
LBA (23-16)
LBA (39-32)
LBA (15-8)
LBA (31-24)
LBA (7-0)
xx
SC TAG xx
FR EXP
FR
xx
xx
At command completion (Shadow Block Registers contents to be read)
ST Status information
DH 1 L 1 x xx
CH EXP
CH
CL EXP
CL
SN EXP
SN
SC EXP
SC
ER
xx
xx
xx
xx
xx
xx
xx
xx
Error information
FUA: If this bit is 1, the device always reports the status after data is
written to a medium.
TAG: Number of a TAG specified by the host