NEC uPD75P3116 User Manual

Page 10

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PD75P3116

10

Data Sheet U11369EJ3V0DS

3.2 Non-Port Pins (2/2)

Pin Name

I/O

Alternate

Function

Status

I/O Circuit

Function

After Reset

Type

S0 to S15

Output

Segment signal output

Note 1

G-A

S16 to S19

Output

P93 to P90

Segment signal output

Input

H

S20 to S23

Output

P83 to P80

Segment signal output

Input

H

COM0 to COM3 Output

Common signal output

Note 1

G-B

V

LC0

to

V

LC2

Power supply for driving LCD

BIAS

Output

Output for external split resistor cut

Note 2

LCDCL

Note 3

Output

P30/MD0

Clock output for driving external expansion driver

Input

E-B

SYNC

Note 3

Output

P31/MD1

Clock output for synchronization of external expansion driver

Input

E-B

Notes 1. V

LCX

(X = 0, 1, 2) is selected as the input source for the display outputs as shown below.

S0 to S23: V

LC1

, COM0 to COM2: V

LC2

, COM3: V

LC0

2. When the split resistor is incorporated:

Low level

When the split resistor is not incorporated: High impedance

3. These pins are provided for future system expansion. Currently, only P30 and P31 are used.

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