Memory configuration – NEC uPD75P3116 User Manual

Page 17

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PD75P3116

17

Data Sheet U11369EJ3V0DS

6. MEMORY CONFIGURATION

Figure 6-1. Program Memory Map

Note

Can only be used in the Mk II mode.

Remark

For instructions other than those noted above, the BR PCDE and BR PCXA instructions can be used to branch

to addresses with changes in the PC’s lower 8 bits only.

MBE

MBE

MBE

MBE

MBE

MBE

MBE

RBE

RBE

RBE

RBE

RBE

RBE

RBE

Internal reset start address (higher 6 bits)

Internal reset start address (lower 8 bits)

INTBT/INT4 start address (higher 6 bits)

INTBT/INT4 start address (lower 8 bits)

INT0 start address (higher 6 bits)

INT0 start address (lower 8 bits)

INT1 start address (higher 6 bits)

INT1 start address (lower 8 bits)

INTCSI start address (higher 6 bits)

INTCSI start address (lower 8 bits)

INTT0 start address (higher 6 bits)

INTT0 start address (lower 8 bits)

INTT1/INTT2 start address (higher 6 bits)

INTT1/INTT2 start address (lower 8 bits)

Reference table for GETI instruction

0000H

0002H

0004H

0006H

0008H

000AH

000CH

0020H

007FH

0080H

07FFH

0800H

0FFFH

1000H

1FFFH

2000H

2FFFH

3000H

3FFFH

CALLF

!faddr instruction

entry address

Branch addresses for
the following instructions
• BR !addr
• CALL !addr
• BRA !addr1
• CALLA !addr1
• BR BCDE
• BR BCXA

Branch/call

address

by GETI

BR $addr instruction

relative branch address

(–15 to –1,

+2 to +16)

BRCB

!caddr instruction

branch address

BRCB

!caddr instruction

branch address

BRCB

!caddr instruction

branch address

BRCB

!caddr instruction

branch address

7

6

5

0

Note

Note

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