NEC uPD75P3116 - Manual (Page 11)

µ
PD75P3116
11 Data Sheet U11369EJ3V0DS
3.3 Pin I/O Circuits
The I/O circuits for the µPD75P3116’s pins are shown in abbreviated form below.
IN
V DD
P-ch
N-ch
V DD
P-ch
N-ch
OUT
Data
Output
disable
IN
V DD
P-ch
IN/OUT
P.U.R.
enable
Data
P.U.R.
Type D
Output
disable
P.U.R. : Pull-Up Resistor
Type A
V DD
P-ch
P.U.R.
enable
P.U.R.
P.U.R. : Pull-Up Resistor
IN
V DD
P-ch
IN/OUT
P.U.R.
enable
Data
P.U.R.
Type D
Output
disable
P.U.R. : Pull-Up Resistor
Type B
CMOS standard input buffer
Push-pull output that can be set to high impedance output
(with both P-ch and N-ch OFF).
Schmitt-triggered input with hysteresis characteristics.
(Continued)
Type A Type D
Type E-B Type B
Type B-C Type F-A