NEC uPD75P3116 - Manual (Page 36)

µµµµµ
PD75P3116
36 Data Sheet U11369EJ3V0DS
DC Characteristics (T
A
= –40 to +85˚C, V
DD
= 1.8 to 5.5 V)
Parameter Symbol Test Conditions MIN. TYP. MAX. Unit
LCD drive voltage V
LCD
VAC0 = 0 T
A
= –40 to +85 ° C 2.7 V
DD
V
T A = –10 to +85 ° C 2.2 V DD V
VAC0 = 1 1.8 V DD V
VAC current Note 1 I VAC VAC0 = 1, V DD = 2.0 V ± 10% 1 4 µ A
LCD output voltage V ODC lo = ± 1.0 µ A V LCD0 = V LCD 0 ± 0.2 V
deviation Note 2 (common) V
LCD1
= V
LCD
× 2/3
LCD output voltage V ODS lo = ± 0.5 µ A V LCD2 = V LCD
× 1/3 0 ± 0.2 V
deviation Note 2 (segment) 1.8 V ≤ V
LCD
≤ V
DD
Supply current Note 3 I
DD1
6.00 MHz Note 4 V
DD
= 5.0 V ± 10% Note 5 3.2 9.5 mA
Crystal oscillation V
DD
= 3.0 V ± 10% Note 6 0.55 1.6 mA
I DD2 C1 = C2 = 22 pF HALT mode V DD = 5.0 V ± 10% 0.7 2.0 mA
V DD = 3.0 V ± 10% 0.25 0.8 mA
I DD1 4.19 MHz Note 4 V DD = 5.0 V ± 10% Note 5 2.5 7.5 mA
Crystal oscillation V DD = 3.0 V ± 10% Note 6 0.45 1.35 mA
I DD2 C1 = C2 = 22 pF HALT mode V DD = 5.0 V ± 10% 0.65 1.8 mA
V DD = 3.0 V ± 10% 0.22 0.7 mA
I
DD3
32.768 kHz Note 7 Low-voltage V
DD
= 3.0 V ± 10% 45 130 µ A
Crystal oscillation mode Note 8 V
DD
= 2.0 V ± 10% 20 55 µ A
V
DD
= 3.0 V, T
A
= 25˚C 45 90 µ A
V
DD
= 3.0 V ± 10% 42 120 µ A
V
DD
= 3.0 V, T
A
= 25˚C 42 85 µ A
I DD4 HALT mode V DD = 3.0 V ± 10% 5.5 18
µ
A
V DD = 2.0 V ± 10% 2.2 7
µ
A
V DD = 3.0 V, T A = 25˚C 5.5 12 µ A
V DD = 3.0 V ± 10% 4.0 12 µ A
V DD = 3.0 V, 4.0 8 µ A
T
A
= 25˚C
I
DD5
XT1 = 0 V Note 10 V
DD
= 5.0 V ± 10% 0.05 10 µ A
STOP mode V
DD
= 3.0 V T
A
= –40 to +85˚C 0.02 5 µ A
± 10%
T
A
= 25˚C 0.02 3 µ A
Notes 1. Set to VAC0 = 0 when the low current consumption mode and the stop mode are used. If VAC0 = 1
is set, the current increases for approx. 1 µ A.
2. The voltage deviation is the difference from the output voltage corresponding to the ideal value of the
segment and common outputs (V
LCDn
; n = 0, 1, 2).
3. Not including currents flowing through on-chip pull-up resistors.
4. Including oscillation of the subsystem clock.
5. When the processor clock control register (PCC) is set to 0011 and the device is operated in the high-
speed mode.
6. When PCC is set to 0000 and the device is operated in the low-speed mode.
7. When the system clock control register (SCC) is set to 1001 and the device is operated on the
subsystem clock, with main system clock oscillation stopped.
8. When the sub-oscillator control register (SOS) is set to 0000.
9. When SOS is set to 0010.
10. When SOS is set to 00
×
1 and the feedback resistor of the sub-oscillator is not used (
×
: Don’t care).
Low current
consumption
mode
Note 9
Low-
voltage
mode Note 8
Low
current
consump-
tion mode
Note 9