Renesas R61509V - Manual (Page 108)

R61509V Target Spec
Rev. 0.11 April 25, 2008, page 108 of 181
Data Transfer Synchronization in 8-bit Bus Interface operation
The R61509V supports data transfer synchronization function to reset the counters for upper and lower 8-
bit transfers in 8-bit bus transfer mode. When a mismatch occurs in upper and lower data transfers due to
noise and so on, the 00H instruction is written four times consecutively to reset the upper and lower
counters in order to restart the data transfer from upper 8 bits. The data transfer synchronization, when
executed periodically, can help the display system recover from runaway.
Make sure to execute data transfer synchronization after reset operation before transferring instruction.
DB17 ~ DB10
WRX
RDX
RS
(8-bit transfer synchronization)
Upper
Lower
Upper Upper Lower
"00"H "00"H "00"H "00"H
Figure 30 8-bit Data Transfer Synchronization