Renesas R61509V - Manual (Page 50)

R61509V Target Spec
Rev. 0.11 April 25, 2008, page 50 of 181
External Display Interface Control 1 (R00Ch)
RIM: Sets the interface format when RGB interface is selected by RM and DM bits. Set RIM bit before
starting display operation via the external display interface. Do not change the setting while the R61509V
performs display operation.
Table 18
RIM RGB interface operation Color
0 18-bt RGB interface (1 transfer/pixel) DB17-0 262,144
1 16-bit RGB interface (1 transfer / pixel) DB17-13, 11-1 65536
Notes: 1: Instruction bits are set via system interface.
2: Transfer the RGB dot data one by one in synchronization with DOTCLK.
DM[1:0]: The DM[1:0] setting allows switching between internal clock operation mode and external
display interface operation mode. However, switching between the RGB interface operation and the
VSYNCX interface operation is prohibited.
Table 19 Display Interface
DM[1:0] Display Interface
2’h0 Internal clock operations
2’h1 RGB interface
2’h2 VSYNC interface
2’h3 Setting inhibited
RM: Selects the interface for RAM access operation. RAM access is possible only via the interface
selected by the RM bit. Set RM = 1 when writing display data via RGB interface. When RM = 0, it is
possible to write data via system interface while performing display operation via RGB interface.
Table 20 RAM Access Interface
RM RAM Access Interface
0 System interface/VSYNC interface
1 RGB interface * Transfer instruction commands via clock synchronous serial interface.
R/W RS IB15 IB14 IB13 IB12 IB11 IB10 IB9 IB8 IB7 IB6 IB5 IB4 IB3 IB2 IB1 IB0
R/W 1 0
ENC
[2]
ENC
[1]
ENC
[0]
0 0 0 RM 0 0
DM
[1]
DM
[0]
0 0 0 RIM
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0