Renesas R61509V - Manual (Page 40)

R61509V Target Spec
Rev. 0.11 April 25, 2008, page 40 of 181
Instruction
Outline
The R61509V adopts 18-bit bus architecture in order to interface to high-performance microcomputer in
high speed. The R61509V starts internal processing after storing control information (18, 16, 9, 8, 1 bit(s)),
sent from the microcomputer, in the instruction register (IR) and the data register (DR). Since the internal
operation of the R61509V is controlled by the signals sent from the microcomputer, the register selection
signal (RS), the read/write signal (R/W), and the internal 16-bit data bus signals (IB15 ~ IB0) are called
instructions. The following are the kinds of instruction of the R61509V.
1. Specify index
2. Display control
3. Power management control
4. Set internal GRAM addresssss
5. Transfer data to and from the internal GRAM
6. Window address control
7. γ-correction
8. Panel Display Control
Normally, the data write instructions (5) are used the most frequently. The internal GRAM address is
updated automatically as data is written to the internal GRAM, which, in combination with the window
address function, contributes to minimizing data transfer and thereby lessens the load on the microcomputer.
The R61509V writes instructions consecutively by executing the instruction within the cycle when it is
written (instruction execution time: 0 cycle).
Instruction Data Format
As the following figure shows, the data bus used to transfer 16 instruction bits (IB[15:0]) is different
according to the data format of a selected interface. Make sure to transfer the instruction bits according to
the format of the selected interface.
The bits to which no instruction is assigned must be set to either “0” or “1” according to the following
register tables. When changing only one instruction bit setting, the setting values in other bits in the
register must be written.