Renesas R61509V - Manual (Page 121)

R61509V Target Spec
Rev. 0.11 April 25, 2008, page 121 of 181
RGB Interface
The R61509V supports the RGB interface. The interface format is set by RM[1:0] bits. The internal RAM
is accessible via RGB interface.
Table 62 RGB interface
RIM RGB Interface DB Pin
0 18-bit RGB interface DB17-0
1 16-bit RGB interface DB17-13, DB11-1
Note: Using multiple interface at a time is prohibited.
RGB Interface
The display operation via RGB interface is synchronized with VSYNCX, HSYNCX, and DOTCLK. The
data can be written only within the specified area with low power consumption by using window address
function. In RGB interface operation, front and back porch periods must be made before and after the
display period. When RGB interface is used, instructions should be transferred via clock synchronous serial
interface. RGB and 80-system bus interfaces cannot be used simultaneously.
VSYNCX
1. The front porch period continues until next VSYNCX input is detected.
2. Make sure to match the VSYNCX, HSYNCX, and DOTCLK frequencies to the resolution of liquid crystal panel.
Moving picture
display area
Display period (NL)
Back porch period (BP)
Front porch period (FP)
Notes:
Back porch period (BPP):
Front porch period (FPP):
Display period:
The number of lines for one frame:
14H ҈ BP ҈ 2H
14H ҈ FP ҈ 2H
FP + BP ҇ 16H
NL ҇ 432H
FP + NL + BP
VSYNCX: Frame synchronization signal
HSYNCX: Line synchronization signal
DOTCLK: Dot clock
ENABLE: Data enable signal
DB 17-0: RGB (6:6:6) display data
HSYNCX
DOTCLK
ENABLE (H)
DB17-0
ENABLE (V)
Figure 42 Display Operation via RGB Interface