Texas Instruments Dual/Single Socket CardBus and UntraMedia Controller PCI7621 - Manual (Page 125)

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4.47 Serial Bus Data Register
The serial bus data register is for programmable serial bus byte reads and writes. This register represents the data
when generating cycles on the serial bus interface. To write a byte, this register must be programmed with the data,
the serial bus index register must be programmed with the byte address, the serial bus slave address must be
programmed with the 7-bit slave address, and the read/write indicator bit must be reset.
On byte reads, the byte address is programmed into the serial bus index register, the serial bus slave address register
must be programmed with both the 7-bit slave address and the read/write indicator bit, and bit 5 (REQBUSY) in the
serial bus control and status register (see Section 4.50) must be polled until clear. Then the contents of this register
are valid read data from the serial bus interface. See Table 4−22 for a complete description of the register contents.
Bit 7 6 5 4 3 2 1 0
Name Serial bus data
Type RW RW RW RW RW RW RW RW
Default 0 0 0 0 0 0 0 0
Register: Serial bus data
Offset: B0h (function 0)
Type: Read/Write
Default: 00h
Table 4−22. Serial Bus Data Register Description
BIT SIGNAL TYPE FUNCTION
7−0 ‡ SBDATA RW
Serial bus data. This bit field represents the data byte in a read or write transaction on the serial interface.
On reads, the REQBUSY bit must be polled to verify that the contents of this register are valid.
‡ These bits are cleared only by the assertion of GRST.
4.48 Serial Bus Index Register
The serial bus index register is for programmable serial bus byte reads and writes. This register represents the byte
address when generating cycles on the serial bus interface. To write a byte, the serial bus data register must be
programmed with the data, this register must be programmed with the byte address, and the serial bus slave address
must be programmed with both the 7-bit slave address and the read/write indicator.
On byte reads, the word address is programmed into this register, the serial bus slave address must be programmed
with both the 7-bit slave address and the read/write indicator bit, and bit 5 (REQBUSY) in the serial bus control and
status register (see Section 4.50) must be polled until clear. Then the contents of the serial bus data register are valid
read data from the serial bus interface. See Table 4−23 for a complete description of the register contents.
Bit 7 6 5 4 3 2 1 0
Name Serial bus index
Type RW RW RW RW RW RW RW RW
Default 0 0 0 0 0 0 0 0
Register: Serial bus index
Offset: B1h (function 0)
Type: Read/Write
Default: 00h
Table 4−23. Serial Bus Index Register Description
BIT SIGNAL TYPE FUNCTION
7−0 ‡ SBINDEX RW Serial bus index. This bit field represents the byte address in a read or write transaction on the serial interface.
‡ These bits are cleared only by the assertion of GRST.