Texas Instruments Dual/Single Socket CardBus and UntraMedia Controller PCI7621 - Manual (Page 292)

14−2
Recommended Operating Conditions (continued)
OPERATION MIN NOM MAX UNIT
PCI
k
3.3 V 0.5 VCCP VCCP
PCI
k
5 V 2 VCCP
3.3 V CardBus 0.475 VCC(A/B) VCC(A/B)
VIH†
High-level input PC Card 3.3 V 16-bit 2 VCC(A/B)
V VIH†
High-level input
voltage PC Card
5 V 16-bit 2.4 VCC(A/B)
V
voltage
PC(0−2) 0.7 VCC VCC
Miscellaneous‡ 2 VCC
SC_DATA, SC_FCB, SC_RFU 0.6 SC_VCC_5V SC_VCC_5V
PCI
k
3.3 V 0 0.3 VCCP
PCI
k
5 V 0 0.8
3.3 V CardBus 0 0.325 VCC(A/B)
VIL†
Low-level input PC Card 3.3 V 16-bit 0 0.8
V VIL†
Low-level input
voltage PC Card
5 V 16-bit 0 0.8
V
voltage
PC(0−2) 0 0.2 VCC
Miscellaneous‡ 0 0.8
SC_DATA, SC_FCB, SC_RFU 0 0.5
PCI
k
0 VCCP
VI Input voltage
PC Card 0 VCC(A/B)
V VI Input voltage
Miscellaneous‡ 0 VCC
V
SC_DATA, SC_FCB, SC_RFU 0 SC_VCC_5V
PCI
k
0 VCC
VO§ Output voltage
PC Card 0 VCC
V VO§ Output voltage
Miscellaneous‡ 0 VCC
V
SC_CLK, SC_DATA, SC_FCB, SC_RFU, SC_RST 0 SC_VCC_5V
Input transition time
PCI and PC Card 1 4
tt
Input transition time
(tr and tf)
Miscellaneous‡ 0 6 ns tt
(tr and tf)
SC_DATA, SC_FCB, SC_RFU 0 1200
ns
IO Output current TPBIAS outputs −5.6 1.3 mA
VID
Differential input Cable inputs during data reception 118 260
mV VID
Differential input
voltage
Cable inputs during arbitration 168 265
mV
VIC
Common-mode TPB cable inputs, source power node 0.4706 2.515
V VIC
Common-mode
input voltage
TPB cable inputs, nonsource power node 0.4706 2.015¶
V
tPU Powerup reset time GRST input 2 ms
† Applies to external inputs and bidirectional buffers without hysteresis
‡ Miscellaneous terminals are A03, B17, C15, C18, E05, E08, F19, H03, J01, J02, J03, J05, J06, J07, L02, L03, L05, M01, M02, M03, N01, N02,
N13, P12, P15, R02, R17, T01 (A_CCDx, A_CDx, A_CVSx, A_VSx, B_CCDx, B_CDx, B_CVSx, B_VSx, SD_DAT0, SD_DAT2, SD_DAT3,
SD_CMD, SD_CLK, SD_DAT1, SM_CLE, SC_CD, SC_OC, SC_PWR_CTRL, CLK_48, SDA, SCL, DATA, LATCH, TEST0, CNA, SUSPEND,
PHY_TEST_MA, and GRST terminals).
§ Applies to external output buffers
¶ For a node that does not source power, see Section 4.2.2.2 in IEEE Std 1394a−2000.
# These junction temperatures reflect simulation conditions. The customer is responsible for verifying junction temperature.
k
MFUNC(0:6) share the same specifications as the PCI terminals.