Texas Instruments Dual/Single Socket CardBus and UntraMedia Controller PCI7621 - Manual (Page 192)

8−12
8.14 Posted Write Address High Register
The posted write address high register communicates error information if a write request is posted and an error occurs
while writing the posted data packet. See Table 8−10 for a complete description of the register contents.
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Name Posted write address high
Type RU RU RU RU RU RU RU RU RU RU RU RU RU RU RU RU
Default X X X X X X X X X X X X X X X X
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Name Posted write address high
Type RU RU RU RU RU RU RU RU RU RU RU RU RU RU RU RU
Default X X X X X X X X X X X X X X X X
Register: Posted write address high
Offset: 3Ch
Type: Read/Update
Default: XXXX XXXXh
Table 8−10. Posted Write Address High Register Description
BIT FIELD NAME TYPE DESCRIPTION
31−16 sourceID RU This field is the 10-bit bus number (bits 31−22) and 6-bit node number (bits 21−16) of the node that
issued the write request that failed.
15−0 offsetHi RU The upper 16 bits of the 1394 destination offset of the write request that failed.
8.15 Vendor ID Register
The vendor ID register holds the company ID of an organization that specifies any vendor-unique registers. The
PCI7x21/PCI7x11 controller implements Texas Instruments unique behavior with regards to OHCI. Thus, this register
is read-only and returns 0108 0028h when read.
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Name Vendor ID
Type R R R R R R R R R R R R R R R R
Default 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Name Vendor ID
Type R R R R R R R R R R R R R R R R
Default 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0
Register: Vendor ID
Offset: 40h
Type: Read-only
Default: 0108 0028h