Mode 2 (8-bit timer 0 with auto-reload), Mode 3 (two 8-bit timer 0s), Ee figure 29) – Rainbow Electronics T89C5121 User Manual

Page 75

Advertising
background image

75

A/T8xC5121

4164G–SCR–07/06

Figure 29. Timer 0/Counter x (x = 0 or 1) in Mode 1

Mode 2 (8-bit Timer 0 with
Auto-Reload)

Mode 2 configures Timer 0 as an 8-bit Timer 0 (TL0 register) that automatically reloads
from the TH0 register (see Figure 30). TL0 overflow sets the TF0 flag in the TCON reg-
ister and reloads TL0 with the contents of TH0, which is preset by the software. When
the interrupt request is serviced, the hardware clears TF0. The reload leaves TH0
unchanged. The next reload value may be changed at any time by writing it to the TH0
register.

Figure 30. Timer 0/Counter x (x = 0 or 1) in Mode 2

Mode 3 (Two 8-bit Timer 0s)

Mode 3 configures Timer 0 so that registers TL0 and TH0 operate as 8-bit Timer 0s (see
Figure 31). This mode is provided for applications requiring an additional 8-bit Timer 0 or
Counter. TL0 uses the Timer 0 control bits C/T0# and GATE0 in the TMOD register, and
TR0 and TF0 in the TCON register in the normal manner. TH0 is locked into a Timer 0
function (counting F

UART

) and takes over use of the Timer 1 interrupt (TF1) and run con-

trol (TR1) bits. Thus, operation of Timer 1 is restricted when Timer 0 is in mode 3.

TRx

TCON reg

TFx

TCON reg

0

1

GATEx

TMOD reg

Overflow

Timer 0 x
Interrupt
Request

C/Tx#

TMOD reg

TLx

(8 bits)

THx

(8 bits)

INTx#

Tx

FCLK_Periph

TRx

TCON reg

TFx

TCON reg

0

1

GATEx

TMOD reg

Overflow

Timer 0 x
Interrupt
Request

C/Tx#

TMOD reg

TLx

(8 bits)

THx

(8 bits)

INTx#

Tx

FCLK_Periph

Advertising