76
A/T8xC5121
4164G–SCR–07/06
Figure 31. Timer 0/Counter 0 in Mode 3: Two 8-bit Counters
TR0
TCON.4
TF0
TCON.5
INT0
0
1
GATE0
TMOD.3
Overflow
Timer 0
Interrupt
Request
C/T0#
TMOD.2
TL0
(8 bits)
TR1
TCON.6
TH0
(8 bits)
TF1
TCON.7
Overflow
Timer 1
Interrupt
Request
T0
FCLK_Periph
FCLK_Periph