Rockwell Automation 1734-SSI POINT I/O Synchronous Serial Interface Absolute Encoder Module User Manual - Manual (Page 35)

Publication 1734-UM007D-EN-P - December 2005
Set and Operate Your Module 4-7
Major module faults are indicated by the presence of the CCF and CCE
bits, bits 1 and 2 respectively of Status Byte 1.If either of these bits is
1, you do not receive correct SSI sensor data. Try resetting the module
with a power cycle.
If either of these bits remain ON, call technical support for further
assistance.You can monitor power or major module faults by
monitoring a single bit in Status Byte 1; the IDF bit (bit 3 of Status
Byte 1). We recommend that you place the IDF bit in your ladder logic
as an indicator of SSI sensor data integrity. If the IDF bit is set to 1 for
any of the reasons discussed above, you can quickly switch your
system to a safe state for troubleshooting.
Example of Using the
1734-SSI Module with a
24-bit SSI Sensor See the diagram that illustrates the SSI clock (CLK) signal that is sent
to the SSI sensor by the 1734-SSI module and the SSI data (DATA)
coming back to the module from the sensor.
The CLK and DATA signals are representative of what you could
actually see on an oscilloscope when the module is attached to a SSI
sensor in a live system. The SSI module must be configured for a SSI
Word length of 24, as well as the proper Data Rate and SSI Word
Delay time stated in the SSI sensor specifications.
SSI Word Delay time is approximately equal to a value called
monoflop time, as stated by some SSI sensor manufacturers. When
configuring the 1734-SSI module, enter the monoflop time value for
SSI Word Delay time.
Point A of the CLK signal is a falling clock edge. When the SSI sensor
sees the first falling clock edge after a delay period, it knows to latch
its current position into a parallel-to-serial converter located in the
sensor.
0 0 1 1 1 0 0 0 0 1 0 0 1 0 0 1 0 1 1 1 0 1 0 1
1 C 2 9 E A
CLK
DATA
A B MSB LSB
SSI WORD DELAY
TIME
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