Kontron AT8050 - Manual (Page 29)

13 AT8050
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temperature). The SAS controller can be on a AMC carrier blade connected to the AT8050 through x4
PCIExpress in the Update Channel Interface. See the AMC carrier blade's specification for more information
about its storage capabilities and restrictions.
2.5.2 Serial ATA (ICH10R)
SATA ports are locally available from the AT8050.
One ICH10R SATA port is connected to the AMC Port 2 through a multiplexer.
The ICH10R SATA host controller supports independent DMA operation and supports data transfer rates of up
to 3.0 Gb/s (300 MB/s). The SATA controller contains two modes of operation - a legacy mode using I/O
space, and an AHCI mode using memory space. When configured in legacy mode, the SATA controller doesn't
provide AHCI capabilities. The ICH10R supports the Serial ATA Specification, Revision 1.0a. The ICH10 also
supports several optional sections of the Serial ATA II: Extensions to Serial ATA 1.0 Specification, Revision
1.0 (AHCI support is required for some elements).
2.6 Update Channel
The AT8050 update channel can be used to interface with an AMC carrier blade, such as the AT8402 Kontron
AMC carrier, via x4 PCI-Express link. This feature offer additional application possibilities to the AT8050.
Consult the AMC carrier blade's technical reference manual for more information about these possibilities or
contact your local technical support team for further details about the update channel.
2.7 Real Time Clock & NVRAM
The AT8050 is a battery less board. The real time clock and non-volatile RAM integrated in the ICH are
powered by the suspend power when available. A SuperCap provides sufficient power to retain the real time
clock for a typical duration of 2hrs. The real time clock precision is 100ppm or better.
Although it is possible to save the CMOS setup in NVRAM (or CMOS RAM), the default configuration saves the
setup in flash. So, when the AT8050 is unpowered for too long, only the time and date will be lost.
2.8 Redundant BIOS Flash
Two BIOS SPI flash are present on the AT8050. If for some reason a BIOS update corrupts a flash and it
prevents the CPU from completing the boot sequence, the IPMC will swap the active SPI flash and force a
reboot.
Note:
Since the CMOS setup is saved in flash, this will also restore the previous BIOS setup.
BIOS Settings:
Management --> System Information --> BIOS In Use
Exit --> Exit and Execute BIOS Swap