Altera Parallel Flash Loader IP User Manual

Page 52

Advertising
background image

Example 2: Normal Mode

• Normal mode configuration time calculation:

.rbf

size for EP2S15 = 577KB = 590,848 Bytes

Configuration mode = FPP without data compression or encryption
Flash access mode = Normal Mode
Flash data bus width = 16 bits
Flash access time = 100 ns
PFL input Clock = 100 MHz
DCLK ratio = 2

• Use the following formulas in this calculation:

Caccess = Taccess*Fclk+1
Cflash for Normal Mode = Caccess / 2
Ccfg = 2.5
Coverhead = 3*Caccess
Total Clock Cycles = Coverhead + max (Cflash, Ccfg)*N
Total Configuration Time = Total Clock Cycle/ PFL Input Clock

• Substitute these values in the following formulas:

Caccess = (100ns * 100MHz) + 1 = 11
Cflash = 11/2 = 5.5
Ccfg = 2.5
Coverhead = 3*11 = 33
Total Clock Cycles = 33 + 5.5 * 590848 = 3249697
Total Configuration Time at 100 MHz = 3249697/ 100 × 106 = 32.5ms

52

Specifications

UG-01082

2015.01.23

Altera Corporation

Parallel Flash Loader IP Core User Guide

Send Feedback

Advertising