Altera Stratix IV E FPGA - Manual (Page 21)

Chapter 4: Development Board Setup 4–5
Factory Default Switch Settings
June 2011 Altera Corporation Stratix IV E FPGA Development Kit User Guide
4. Set DIP switch bank (SW4) to match Table 4–3 and Figure 4–1 .
5. Set the board jumpers to match Table 4–4 , Figure 4–1 , and Figure 4–2 .
Table 4–3. SW4 Dip Switch Settings
Switch
Board
Label
Function
Default
Position
1 USER_DIPSW0
Switch 1 is a user-defined switch and has the following options:
■ When closed, a logic 0 is selected.
■ When open, a logic 1 is selected.
Open
2 USER_DIPSW1
Switch 2 is a user-defined switch and has the following options:
■ When closed, a logic 0 is selected.
■ When open, a logic 1 is selected.
Open
3 USER_DIPSW2
Switch 3 is a user-defined switch and has the following options:
■ When closed, a logic 0 is selected.
■ When open, a logic 1 is selected.
Open
4 USER_DIPSW3
Switch 4 is a user-defined switch and has the following options:
■ When closed, a logic 0 is selected.
■ When open, a logic 1 is selected.
Open
5 USER_DIPSW4
Switch 5 is a user-defined switch and has the following options:
■ When closed, a logic 0 is selected.
■ When open, a logic 1 is selected.
Closed
6 USER_DIPSW5
Switch 6 is a user-defined switch and has the following options:
■ When closed, a logic 0 is selected.
■ When open, a logic 1 is selected.
Closed
7 USER_DIPSW6
Switch 7 is a user-defined switch and has the following options:
■ When closed, a logic 0 is selected.
■ When open, a logic 1 is selected.
Closed
8 USER_DIPSW7
Switch 8 is a user-defined switch and has the following options:
■ When closed, a logic 0 is selected.
■ When open, a logic 1 is selected.
Closed