The ddr3 tab, The ddr3 tab –13, Start –13 stop –13 performance indicators –13 – Altera Stratix IV E FPGA User Manual

Page 39

Advertising
background image

Chapter 6: Board Test System

6–13

Using the Board Test System

June 2011

Altera Corporation

Stratix IV E FPGA Development Kit User Guide

The DDR3 Tab

The DDR3 tab allows you to read and write the DDR3 memory on your board.

Figure 6–6

shows the DDR3 tab.

The following sections describe the controls on the DDR3 tab.

Start

The Start control initiates DDR3 memory transaction performance analysis.

Stop

The Stop control terminates transaction performance analysis.

Performance Indicators

These controls display current transaction performance analysis information collected
since you last pressed Start:

Figure 6–6. The DDR3 Tab

Advertising