Altera Stratix IV GX FPGA Development Board - Manual (Page 21)

Chapter 2: Board Components 2–13
Configuration, Status, and Setup Elements
November 2010 Altera Corporation Stratix IV GX FPGA Development Board, 530 Edition Reference Manual
The embedded USB-Blaster is automatically disabled when an external USB-Blaster is
connected to the JTAG chain.
Figure 2–4 illustrates the JTAG chain.
Figure 2–4. JTAG Chain
Embedded
Blaster
GPIO
TCK
4SGX230
FPGA
Analog
Switch
EPM2210
System
Controller
HSMC
Port A
HSMC
Port B
GPIO
TMS
GPIO
TDO
GPIO
TDI
JTAG Master
GPIO
DISABLE
JTAG Master/Slave
JTAG Master/Slave
Installed
HSMC
Card
Installed
HSMC
Card
TCK
TMS
TDI
TDO
TCK
TMS
TDI
TDO
TCK
TMS
TDI
TDO
TCK
TMS
TDI
TDO
JTAG Slave
JTAG Slave
Analog
Switch
Analog
Switch
EPM2210_JTAG_EN
HSMA_JTAG_EN
HSMB_JTAG_EN
ALWAYS
ENABLED
(in chain)
SW6.1
SW6.2
SW6.3
SW4.2
10-pin
JTAG Header
Flash
Memory
(on install)
PCI Express
Edge
Connector
JTAG Master/Slave
PCI Express
Motherboard
TCK
TMS
TDI
TDO
Analog
Switch
PCIE_JTAG_EN
SW6.4
Embedded
Blaster
Connection
USB
PHY
J7
J8