Altera Arria GX Development Board User Manual
Page 18
2–8
Reference Manual
Altera Corporation
Arria GX Development Board
October 2007
Configuration Schemes
Figure 2–4
shows the Arria GX configuration scheme.
Figure 2–4. Arria GX Configuration Scheme
Table 2–4
lists the supported configuration modes and settings. The
MSEL(3:0)
bits are set using the MAX II device. The
CFG_MODE(1:0)
pins must be set on the configuration DIP switch.
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Table 2–4. Supported Configuration Modes & Settings,
Note (1)
Configuration
Scheme
FPGA MSEL Settings (from MAX II Device)
DIP Switch Settings
MSEL-3
MSEL-2
MSEL-1
MSEL-0
CFG_MODE-1 CFG_MODE-0
Fast passive
parallel (FPP)
0
0
0
0
0
0
Remote system
upgrade FPP,
(2)
0
1
0
0
0
1
FPP with
decompression
1
0
1
1
1
0