Altera Nios Development Board Stratix II Edition - Manual (Page 49)

Altera Corporation Reference Manual 2–39
May 2007 Nios Development Board Stratix II Edition
Board Components
User Configuration
The user configuration partition is 4 MB, starting at offset 0x00800000.
This section contains the FPGA configuration data for the user
configuration. Nios II development tools include documentation on how
to create your own user configuration image and program it into flash
memory.
Factory Configuration
The factory configuration partition is 4032 KB, starting at offset
0x00C00000. This section contains the FPGA configuration data for the
factory configuration. The Nios II processor system in the factory
configuration is designed to start executing code from offset 0x00000000
in the flash memory. The Nios II development tools include the source
files for the factory programmed hardware and software reference
designs.
Persistent Data
The persistent data partition is 64 KB, starting at offset 0x00FF0000. This
partition is for maintaining nonvolatile settings and data, such as the
MAC address and IP address for the factory-programmed web server
reference design. Persistent data is technically no different than other
application data, but it is often convenient to think of certain data as
independent from the user hardware or software.
JTAG Connectors
(J24 & J5) The Nios development board has two 10-pin JTAG headers (J24 and J5)
compatible with Altera download cables, such as the USB-Blaster™. On
the Nios development board, each JTAG header connects to one Altera
device and forms a single-device JTAG chain. J24 connects to the FPGA
(U60), and J5 connects to the EPM7256AE device (U3).
JTAG Connector to FPGA (J24)
J24 connects to the JTAG pins (TCK, TDI, TDO, TMS, TRST) of the FPGA
(U60) as shown in
Figure 2–18 . Altera Quartus II software can directly
configure the FPGA with a new hardware image via an Altera download
cable as shown in
Figure 2–19 . In addition, the Nios II IDE can access the
Nios II processor JTAG debug module via a download cable connected to
the J24 JTAG connector.